1. Field of the Invention
The present invention relates to a semiconductor device, in which silicon or polysilicon including a p-type impurity and silicon or polysilicon including an n-type impurity are electrically connected with each other using a metal silicide film, and a method for fabricating the same.
2. Description of the Related Art
In recent years, it has been known that, in order to reduce the size of an MOS transistor, it is advantageous to use p.sup.+ -type polysilicon for a gate electrode of a p-channel MOS transistor and n.sup.+ -type polysilicon for a gate electrode of an n-channel MOS transistor. The advantages achieved by this technique is described, for example, in IEEE, IEDM, Technical Digest, pp. 418-422 (1984). Also, in general a p.sup.+ -type polysilicon film is used to form a contact between a polysilicon film and a p.sup.+ -type region formed in a semiconductor substrate, and an n.sup.+ -type polysilicon film is used to form a contact between a polysilicon film and an n.sup.+ -type region formed in the semiconductor substrate.
In view of the above points, in forming a CMOS semiconductor device in which both p-channel and n-channel MOS transistors are formed on one semiconductor substrate, it is advantageous to form both p.sup.+ -type regions and n.sup.+ -type regions in one polysilicon layer in a mixed condition, in order to reduce the size of an integrated circuit device as well as other purposes.
The polysilicon layer has a high specific resistance compared with a general metal film. For this reason, it is a general practice to deposit on the polysilicon layer a refractory metal silicide film, a nitride film of a refractory metal, or the like, so as to form a polycide film including two-layers. Furthermore, after forming the polycide film including the two-layer structure of the polysilicon film and the metal silicide film, the polycide film can be subjected to heat treatment at 900.degree. C. so as to be planarized using a BPSG film (boron and phosphorus contained silicate glass). This type of semiconductor device is disclosed, for example, in Japanese Laid-Open Patent Publication No. 57-192079. Moreover, in this two-layer polycide film, the p.sup.+ -polysilicon film and the n.sup.+ -polysilicon film can electrically communicate with each other through the refractory metal silicide film, the nitride film of the refractory metal, or the like, thereby eliminating the necessity of formation of an additional contact area for the connection therebetween.
However, in the case of the polycide film formed by simply depositing the metal silicide film on the polysilicon film; when it is subjected to heat treatment in a post-process such as the planarization using the BPSG film, boron, which is a typical p-type impurity contained in the p.sup.+ -polysilicon film, and phosphorus or arsenic, which are typical n-type impurities contained in the n.sup.+ -type region, diffuse into the metal silicide film and become mixed with each other. This causes, when the polycide film is used for a gate electrode of a MOSFET, deviation in the threshold voltage (Vt) of the MOSFET. This deviation of the threshold voltage generally occurs for a p-channel MOSFET, and not for an n-channel MOSFET. This problem is described, for example, in IEEE, Electron Device Letter, Vol. 12, pp. 696-698 (1991).
This problem will be described with reference to FIGS. 10A and 10B. FIGS. 10A and 10B schematically illustrate the configuration of a semiconductor device 900 in which an n-type MOSFET 102a and a p-type MOSFET 102b are formed in a semiconductor substrate 190 with isolation regions 101 therebetween. FIG. 10B is a cross-sectional view taken along a line 10B--10B' in FIG. 10A.
As shown in FIGS. 10A and 10B, the n-type MOSFET 102a includes a source 103a and a drain 104a, and the p-type MOSFET 102b includes a source 103b and a drain 104b. A polycide gate 105a containing an n-type impurity such as arsenic (As) and a polycide gate 105b containing a p-type impurity such as boron (B) are provided for the n-type MOSFET 102a and the p-type MOSFET 102b, respectively.
Each of the polycide gates 105a and 105b is formed by laminating a tungsten silicide film 107 on a polysilicon film of a lower layer. A polysilicon film of the polycide gate 105a on the n-type MOSFET 102a is doped with an n-type impurity to form an n.sup.+ -type polysilicon film 106a. In the same manner, a polysilicon film of the polycide gate 105b on the p-type MOSFET 102b is doped with a p-type impurity to form a p.sup.+ -type polysilicon film 106b. Hereinafter, the reference numeral 106 is used for collectively referring to both the n.sup.+ -polysilicon film 106a and the p.sup.+ -type polysilicon film 106b.
When the semiconductor device 900 having the polycide structure including the tungsten silicide film 107 laminated on the polysilicon film 106 of the lower layer is subjected to heat treatment, arsenic, which is the n-type impurity in the n.sup.+ -type polysilicon film 106a, diffuses into the p.sup.+ -type polysilicon film 106b in the gate 105b of the p-type MOSFET 102b, as shown in FIG. 10B. In the same manner, boron, which is the p-type impurity in the p.sup.+ -type polysilicon film 106b, diffuses into the n.sup.+ -type polysilicon film 106a in the gate 105a of the n-type MOSFET 102a. The diffusion of such impurities leads to change in a work function of the gate electrodes of the semiconductor device 900, thereby deviating the threshold voltage (Vt).
In the same manner, if an interconnection connected to the gate 103a and the drain 104a which are n.sup.+ -type diffused regions and to the gate 103b and the drain 104b which are p.sup.+ -type diffused regions is formed by using the above polycide structure, the contact resistance deviates.
In order to prevent lateral diffusion of the impurities through the metal silicide film as described above, a semiconductor device including a diffusion barrier film between the polysilicon film and the metal silicide film, and a method for fabricating the same, have been disclosed, for example, in Japanese Laid-Open Patent Publication Nos. 1-265542 and No. 2-192161.
However, the methods disclosed in the above references for forming the polycide film with the diffusion barrier film lengthens the fabrication process and raises the cost thereof. Furthermore, the effect of a TiN film as the diffusion barrier film is not stable because it depends greatly upon fabrication parameters such as the composition ratio of N/Ti, the amount of oxygen contained as an impurity, the grain size, and the crystal orientation. In particular, when the polycide film is used for interconnections, the thickness of the TiN film is reduced at the contact areas, and thus the effect of the diffusion barrier may be lost. Consequently, p-type impurities or n-type impurities contained in the polysilicon film diffuse into the metal silicide layer, and further diffuse through the metal silicide film. With this diffusion, the p-type impurities reach the n.sup.+ -type polysilicon film and the n-type impurities reach the p.sup.+ -type polysilicon film. As a result, the carrier concentration is lowered due to the compensation effect, which is in turn causes the problem of deviated contact resistance.